1. Technical Field
A method is disclosed for forming a cell capacitor for a high-integrated DRAM which provides good interfacial properties of aluminum oxide and excellent leakage current preventive properties by depositing an aluminum oxide layer and a mixed layer of TiON and TiO2 as dielectric layers on a semiconductor substrate having a predetermined lower substructure by an atomic layer deposition (ALD) method and thus forming a double layer structure, and simultaneously providing a high capacitance by using a high dielectric property of a mixed layer of TiON and TiO2.
2. Description of the Related Art
Recently, with the development of semiconductor integrated circuit processing techniques, the minimum line width of a device manufactured on a semiconductor substrate is decreasing and unit area integration degree is increasing. Meanwhile, as the integration degree of a memory cell increases, a space occupied by a cell capacitor for charge storage becomes smaller. Thus, it is necessary to develop a cell capacitor having an increased unit area capacitance.
Generally, a capacitor is used for storing charge and supplying charge as needed for the operation of a semiconductor substrate. As the semiconductor becomes more highly integrated, the size of a unit cell becomes smaller and the capacitance required for the operation of the device increases.
The structure of a charge storage electrode of the capacitor is divided broadly into a stacked structure for acquiring a large capacitor area by stacking multi-layers on a narrow planar area and a trench structure for storing charge by forming a trench of a predetermined depth on a semiconductor substrate and then forming a capacitor on that portion.
Particularly, efforts for increasing the charging capacitance of the capacitor are made by constructing the stacked structure as a deformed capacitor structure such as HSG (hemispherical shaped grains), bellows, etc. which are formed by deforming a fin type, a cylinder type and a cavity type.
In a conventional art, with the high integration of semiconductor devices, capacitors also are required to be miniaturized. However, there is a limitation on storing charge, so there occurs a difficulty in highly integrating the capacitor as compared with the size of a cell.
Therefore, to solve the above problem, a material with a high dielectric constant such as TiON is used for increasing the charge of the capacitor, however, use of materials with a high dielectric constant leads to a high leakage current in performing the subsequent process.
In contrast, when aluminum oxide is used for guaranteeing a low leakage current, interfacial properties and leakage current properties are excellent, but capacitance is low.
A method for forming a cell capacitor for a high-integrated DRAM is disclosed which provides good interfacial properties of aluminum oxide and excellent leakage current preventive properties by depositing an aluminum oxide layer and a mixed layer of TiON and TiO2 as dielectric layers on a semiconductor substrate having a predetermined lower substructure by an atomic layer deposition (ALD) method and thus forming a double layer structure, and simultaneously provides a high capacitance by using a high dielectric property of a mixed layer of TiON and TiO2.
A method for forming a cell capacitor for a high-integrated DRAM in accordance with the disclosure comprises: depositing a first dielectric layer on a semiconductor substrate having a predetermined lower structure; performing an annealing process under nitrogen atmosphere again after performing a plasma annealing process on the resultant material; performing a low temperature annealing and a furnace vacuum annealing processes after depositing a second dielectric layer on the resultant material; and depositing sequentially a titanium nitride layer and a poly silicon layer on the resultant material.